Lattice Avant of Mid-Range FPGAs May Be the Biggest Winner

February 7, 2023
Frost&Sullivan forecasts that global FPGA demand will grow from $6.86 billion in 2021 to $12.58 billion in 2025, representing a compound annual growth rate of about 16.4%.

But from the perspective of industry structure, after nearly 40 years of development, FPGA global market competition pattern has become stable. According to the data released by Gartner, in 2021, the market share of AMD (Xilinx), Intel (Altera), Lattice, and Microchip reached 51%, 29%, 7%, and 6% respectively, accounting for 93% of the global FPGA market.

However, as Altera and Xilinx were acquired by Intel and AMD, the two giants began to develop on the higher end of the FPGA market to match the parent company’s data center strategy. In September, AMD announced that the life cycle of the Xilinx 7 series of products will be extended to 2035 and that some Xilinx 7 products have been working in the market for 10 years, which means that in the mid-end FPGA area, AMD’s strategy is to maintain the old market rather than increase input. This is an opportunity for FPGA manufacturers, which were originally developed at the low end of the market.

Lattice has recently launched the new Lattice Avant™ FPGA platform, which aims to extend its expertise in low-power architecture, small size and high performance to mid-range FPGAs. Industry insiders believe that Lattice or become a trailblazer in the mid-end FPGA market.

What is a mid-range FPGA?

Generally speaking, we call the 100k and below the logic unit, FPGA called low-end FPGA, 100k~500k logic unit FPGA is called the mid-range FPGA, and 500k above logic unit FPGA is called high-end FPGA.

For FPGA, the arrangement design of the logical unit and Fab process is closely coordinated, so the high, middle and low FPGA process will be different, so according to the FPGA chip process, can also roughly distinguish it belongs to the high, middle and low level.

Taking the products of Lattice as an example, it can be seen that the previous generation of Nexus series adopted 28nm FD-SOI process, and the whole series also belongs to the ranks of low-end FPGA, with more advantages of low power consumption. The recently launched Avant series adopts the 16nm FinFET process of Taiwan Semiconductor, and the whole series belongs to the ranks of mid-end FPGA.

Some people may ask why low-end FPGAs can’t use more advanced processes, is this “market discrimination”? In fact, this is not the case. For example, the FPGA of 100k logical unit is not suitable for 16nm FinFET process, because the Fabric area of its logical unit is not large. If 16nm is adopted, it can be made smaller, but the external I/O cannot be reduced from 28nm to 16nm along with the process. So a lot of die size will be wasted.

Of course, from low-end FPGA iteration to mid-range FPGA, the improvement of performance and power consumption is definitely not only technological improvement, but also related to the architecture. “Considering the balance between power consumption and computing performance, the Avant series did not simply follow the competitor’s architecture, but made some innovations in fabric’s architecture, utilizing the optimized LUT4 architecture.” revealed Xu Honglai, president of Lattice Semiconductor Shanghai Asia Pacific.

Comparison of three popular midrange FPGA products in the market

The previous mainstream mid-range FPGA products in the market mainly include Intel Arria V GZ (450k logic unit) and AMD Kintex-7 (478k logic unit). Now we can add the Avant series of Lattice, because the Avant-E series, the first product based on the Avant platform, has 2.5 times lower chip power consumption, 2 times higher performance and 6 times lower package volume compared with the two products.

Lattice Avant vs Arria V GZ, Kintex-7
Lattice Avant vs Arria V GZ, Kintex-7

In terms of interconnect, the Avant-E family of chips also boasts configurable SERDES of up to 25 Gbps, support for hardcore PCIe® Gen 4, high-performance I/O and high-speed memory interface support, including LPDDR4 and DDR5.

In terms of software support, Lattice also provides easy-to-use design tools, reference designs and SDKS, various types of IP, and a collection of application-specific solutions, which can help customers achieve more efficient design and development and faster time-to-market.

Significant opportunity in mid-range FPGA market

Compared with the previous Nexus series, Avant’s chip capacity is increased by 5 times, bandwidth is increased by 10 times, and performance is improved by 30 times. Avant is more in line with the current needs of communication, computing, industry, automotive and other fields, thus solving some of the key challenges faced by customers at the edge of the network. Lattice predicts that the launch of Avant series will bring an incremental revenue of 3 billion dollars to Lattice, including the stock market in the United States and the incremental market in China.

Lattice believes the Avant series will bring in $3 billion in incremental revenue
Lattice believes the Avant series will bring in $3 billion in incremental revenue

Regarding the current market situation, Wang Cheng, Vice President/General Manager of China Sales of Lattice Semiconductor Shanghai Co., LTD., said: “The focus of the communication industry is stronger, mainly focusing on the three fields of wireless, optical and core network. The communication industry requires more and more focus, but there are no major changes in protocol development at present, and more just capacity expansion and upgrading. Therefore, after 5G, many successful solutions are ASIC chips of large communication manufacturers, and the market share of FPGA is declining in mature communication fields.”

The industrial field will bring more opportunities to FPGAs. Although industrial applications are subdivided differently, but at the level of FPGA, large applications have a certain unity, for example, whether it is machine vision or security is a visual interface, whether it is AI used in the industrial field or driving field, many are algorithms, requiring a large number of DSP, coprocessor, real-time processor, memory, whether it is the edge of the edge, Or edge communication, it needs a flexible low power application, in the FPGA level are relatively consistent requirements. “And we think that the big ports are becoming more and more consistent. We’re seeing video ports that used to be different, like HDMI, eDP, SDI, and so on, and now we’re seeing video ports that are going to be more and more unified, just like the various charging cables on mobile phones that were eventually replaced by TYPE-C.”

In the past, with the rapid development of communication, 3C industry and data center, the iteration speed of FPGA market is relatively fast. However, in recent years, with the focus of FPGA at the abstract level and the overlay of the input-output ratio of advanced technology, the iteration speed is not as fast as before. Therefore, the era in which FPGA obtains product competitive advantages by technology iteration and product iteration may be fading away. In the future, the revenue or market direction of FPGA should be close to marketization.


Regarding the next product plan of Avant platform, Xu Honglai said: “Similar to the Nexus platform, Lattice has developed a clear product roadmap based on the Avant platform. After the Avant-E series, there may be two models. One is to reduce the scale, for example, from 500k to 200k, to match customer demand. The other is for specific applications to meet the I/O performance and power consumption requirements, especially for industrial or automotive customers.”

Regarding the development of the ecological chain, Xu Honglai revealed that Lattice hopes to have more IP partners in China for joint development, not only the IP at the application level, but also some IP built by FPGA itself.