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ECP5/ECP5-5G FPGA Family
The ECP5™/ECP5-5G™ family of FPGA devices is optimized to deliver high-performance features such as an enhanced DSP architecture, high-speed SerDes(Serializer/Deserializer), and high-speed source synchronous interfaces, in an economical FPGA fabric.
This combination is achieved through advances in device architecture and the use of 40 nm technology making the devices suitable for high-volume, high-speed, and low-cost applications.
- 270 Mb/s, up to 3.2 Gb/s, SerDes interface(ECP5)
- 270 Mb/s, up to 5.0 Gb/s, SerDes interface(ECP5-5G)
- Up to 4 channels per device in dual channel blocks for higher granularity
- Dedicated DDR2/DDR3 and LPDDR2/LPDDR3 memory support with DQS logic, up to 800 Mb/s data-rate
- Single Event Upset (SEU) Mitigation Support
- Enhanced DSP blocks provide 2x resource improvement for symmetrical filters
What are the devices of ECP5/ECP5-5G FPGA?
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