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LatticeECP3 FPGA Family
The LatticeECP3 (EConomy Plus Third generation) family of FPGA devices is optimized to deliver high-performance features such as an enhanced DSP architecture, high-speed SERDES, and high-speed source synchronous interfaces in an economical FPGA fabric. This combination is achieved through advances in device architecture and the use of 65 nm technology making the devices suitable for high-volume, high-speed, low-cost applications.
The LatticeECP3 device family expands look-up-table (LUT) capacity to 149 K logic elements and supports up to 586 user I/O. The LatticeECP3 device family also offers up to 320 18 x 18 multipliers and a wide range of parallel I/O standards.
- 150 Mbps to 3.2 Gbps for Generic 8b10b, 10-bit SERDES, and 8-bit SERDES modes
- Data Rates 230 Mbps to 3.2 Gbps per channel for all other protocols
- Up to 16 channels per device: PCI Express, SONET/SDH, Ethernet (1GbE, SGMII, XAUI), CPRI, SMPTE 3G and Serial RapidIO
- Up to 6.85 Mbits sysMEM™ Embedded Block RAM (EBR)
- 12 to 160 slices for high-performance multiply and accumulate
- 800 MBps DDR3, 1Gbps LVDS
What are the devices of LatticeECP3 FPGA?
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