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Lattice Semiconductor

MachXO5-NX FPGA Family

The MachXO5™-NX family of low-power FPGAs can be used in a wide range of applications, and are optimized for bridging, I/O expansion, and board control and management. It is built on Lattice Nexus FPGA platform, using low-power 28 nm FD-SOI technology. It combines the extreme flexibility of an FPGA with the low power and high reliability (due to the extreme low Soft Error Rate) of FD-SOI technology, and offers small footprint package options.
The MachXO5-NX family supports a variety of interfaces including MIPI D-PHY (CSI-2, DSI), LVDS, SLVS, subLVDS, SGMII (Gigabit Ethernet), and more. It includes embedded flash memory for on-chip multi-boot and UFM.
The MachXO5-NX FPGA supports the fast configuration of its reconfigurable SRAM-based logic fabric, and ultra-fast configuration of its programmable sysI/O™ from on-chip Flash. To secure user designs, the MachXO5-NX security features include bitstream encryption, authentication, and password protection. In addition to the high reliability inherent to FD-SOI technology (due to its extreme low SER), active reliability features such as built-in frame-based SED/SEC (for SRAM-based logic fabric), and ECC (for EBR and LRAM) are also supported. Built-in ADC is available in each device for system monitoring functions.


  • 25k LC logic density and up to 300 I/O pins
  • 9.2 Mbits of user flash memory and on-chip multi-boot configuration
  • Secure FPGA design using ECDSA bitstream authentication and AES256 encryption
  • Supported by Lattice Radiant® and Lattice Propel™
  • Low power, high reliability, and support for ADC and DSP on the Lattice Nexus™ Platform

MachXO5-NX Commercial/Industrial Family Selection Guide

MachXO5-NX Family Selection Guide

What are the devices of MachXO5-NX FPGA?

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